1. Technical Field
The present invention relates to a microprocessor monitoring apparatus for monitoring an operating status of a CPU (Central Processing Unit), while performing reset operation on the CPU.
2. Description of the Related Art
In an apparatus with a microprocessor, a program may go out of control due to hardware failure, etc. and a hardware timer circuit called a watchdog timer is provided to detect such runaway of the program (for example, see Japanese Laid-Open Patent Publication No. H10-269109). A reset signal is input to the watchdog timer (hereinafter, abbreviated as WDT) from a monitored program at predetermined intervals, and when the reset signal is not input due to runaway of the monitored program, the WDT restarts the microprocessor.
Further, when a program (firmware) that the microprocessor executes is rewritten for the reason of updating the apparatus function, modifying a bug, or the like, in order to execute a new program, it is necessary to restart the microprocessor after the rewrite so as to execute the main program from the first line.
Conventionally, since a restart dedicated circuit is provided to restart, the circuit has become larger. Therefore, it is an object of the present invention to provide a method for enabling a microprocessor to be restarted after rewriting a program without providing a dedicated circuit and an apparatus using the method.